The interpoly/oxide thickness of the poly tip of a floating gate is limited by the thickness of the sidewall oxide of the floating gate. A thinner interpoly oxide would increase erasing speed, but would also decrease the programming speed due to the decreased source/floating gate coupling ratio. A thicker interpoly oxide would decrease erasing speed and endurance.
The interpoly oxide thickness of the poly tip is also limited by the word line oxide of the source/drain area. A thinner interpoly oxide would again increase erasing speed but would reduce the oxide breakdown strength of the word line when erasing with high voltage force.
For example, U.S. Pat. Nos. 5,879,992, 5,950,087, and 5,970,371 all to Hsieh et al describe split gate processes with interpoly oxide layers.
U.S. Pat. No. 5,453,388 to Chen et al. describes a split gate EEPROM with an interpoly oxide layer.
U.S. Pat. No. 5,330,938 to Camerlenghi describes another split gate process.